Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Aims & Scope✦ Inferred from recent articles

This journal focuses on microarchitecture design and optimization for computer processors. Topics include techniques for improving memory reliability and yield, efficient floating-point unit design, dynamic fine-grain body biasing for power and frequency management, global instruction scheduling, and mitigating transistor degradation from NBTI. It also covers parallel programming approaches, on-chip interconnects, software-based defect detection, predictive wearout analysis, network traffic processing, simulation methodologies, architectural pruning, fine-grain parallelization, SIMD branch execution, error detection in cores, cache coherence protocols, cache replacement strategies, 3D chip integration for reliability, prefetching techniques, instruction cache design, workload dynamics analysis, secure processor design with memory encryption, coarse-grain memory hierarchy exploitation, and quality of service in chip multiprocessors. The journal also addresses DRAM refresh power and bandwidth overhead.

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Subject Classification